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2ȸ Ŭȸ Athlon 64 ̵

AMD Athlon 64Over Clock Guide

-ABIT KV8 Pro-

ۼ : ɱȭ(mojji@mojji.net)

 

 

1. Preface

Athlon 64 ̵Դϴ. Athlon 64 ̵尡 ٲ ǽö øϴ. Ͻð ó ֽñ ٶϴ. ׸ Over Clock å å ϸ ڽ ǿ ´ ñ ٶϴ. ׸ ۿ ٸ ý Over Clock ̴ٴ ϰ ۼ Ͽ ˷ 帳ϴ. ó Ͻô ϰ ڼϰ ˷帳ϴ. ׸ Ǿ ˷ 帳ϴ.

 

 

2. Cooling

Ŭ ߿ κ̴. ٸ ͵ ߿ ڴ ϰ ʹ.

ο ׹ۿ ۾ ̴. ʼ ̷ Ѵ. ְ ϱ ؼ ʿ ۾ ϳ̴. ׹ۿ Ĩ鿡 濭۾ ָ . ׸ ۾ ؼ ϴ .

 

 

3.Bios

Over Clock ϴ ̿ ̷ . ̰ ؼ Ŭ ø ø ְ ȴ. ׷ ̿ .

 

̿ ù ȭ̴. Ŭ ޴ . ׷ ó ޴ µGuru Utility . ̰ 90% ̰ ִ. SoftMenu ̰ ̸ ٲ.

 

µGuru Utility  ȭ̴. ϳϳ ڴ.

 

CPU Operating Speed : ó 2000 Ǿ ̴. װ User Define ٲ ־ ڰ ϴ Ŭ ϴ.

 

External Clock : 251/66/33Mhz ̷ ִ. 251 : CPU , 66 : AGP, 33 : PCI  Clock Ÿ ̰ Enter ġ ϴ FSB ȴ.

 

Multiplier Factor : CPU κ̴. 3000+ 10~4 ϴ.

 

AGP Ratio (CPU : AGP : PCI) : κ Fiexed Ű . ׷ CPU FSB  AGP PCI Ŭ AGP PCI ϴ ġ鿡 ִ.

 

Voltages Control : ״ ̴. ̰ Ʈ User Define ־ ϴ. ϴ CPU, AGP, DDR SDRAM, NB, SB Ѿ ߰ HyperTransport Voltage .

 

HyperTransport : 800Mhz CPU ϴ ̰ 1Ghz ϴ LDT ־ CPU FSB * LDT = HyperTransport  ̴. HyperTransport ٰ ƴϸ ݱ ׽Ʈ ٷδ HT ̴ Ÿ ȾҴ. HT HT ÷ ָ ̴.

ABIT EQ Beep Control : µGuru Ĩ¿ Ǵ  ִ ̴. а µ ͸ Ʈ ϴ ޴̴.

̰ ޸ LDT ϴ OverClock Bios κ̶ ִ.

޴ ȭ̴. ̰ DRAM Configuration LDT & PCI Bus Control ޴ ǵ ̴. ׷ DRAM Configuration .

 ̰ ޸ Ÿ̹ ϴ ̴. DRAM Timing Selectable By SPD Manual ؾ ޸ Ÿ̹ ִ. ʰ   Ŭ ϴ  DRAM Command Rate 1T ְ 250 Ϸ ϴ õѴ. ׸ Ѱ ߰ ڸ DRAM Clock 400 1:1 333,266,200 񵿱 ϴ. 64 ýۿ 񵿱 ϸ ϰ Ÿ ڴ DDR 500 ޸𸮸 õѴ. 64 ޸ Ÿ̹ ʱ 500 ޸𸮷 Ŭ ÷ִ õѴ.

 

LDT & PCI Bus Control ȭ̴. ̰ LDT Bus Frequency Ѵ. LDT ϴ ̰ ̸ Ͽ.

 

̴.

Power Management Setup ȭ̴. ̰ CPU THRM-Throttling Disabledְ ȴ. ̰ ̿ .

 

 

6. Test

ù Ҵ. ڽ CPU 󸶸ŭ Ǵ α׷ ׽Ʈϰ Ŭ ÷ָ ȴ. ϴ ó ޸ ڶ Memtest ϱ ٶ Prime, 3dMark α׷ ǻ ؼ ϸ ׽Ʈ ϱ⸦ ٶ.

 

 

5.Finally

˾  ڽ ýۿ Over Clock ٶ. ٽ ѹ OverClock å ڽſ ִٴ ʾ Ѵ. Over Clock ڰ 󸶳 ̴° ´ٰ Ѵ. ׷ ٸ ŭ Ǵµ Ȱ Ǵ°? ʱ⸦ ٶ ª о ּż մϴ.

 


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